von Büren, George

George von Büren received the electrical engineering degree from the Swiss Federal Institute of Technology (ETH) Zürich, Zürich, Switzerland, in 1999. From 1999 to 2002, he was with u-blox Inc., where he was involved in the development of embedded computers and GPS receivers. In 2002, he joined the Electronics Laboratory, ETH Zurich, as a research assistant to pursue his PhD thesis. The research is performed withhin the CASE cooperation. From October 2006 to March 2007, he was with IBM Zurich Research Laboratory developing on a series-source terminated transmitter in 65nm CMOS. His main interests are ICs for high-speed interconnect applications.

Research Interests

• Analog and Mixed-Signal Circuit Design
  Phase-Locked Loop (PLL)
  Clock and Data Recovery (CDR)
  Wireline Communication

Publications

Design and Phase Noise Analysis of a Multiphase 6 to 11 GHz PLL
G. von Bueren, D. Barras, C. Kromer, A. Huber, M. Kossel, H. Jackel
European Solid-State Circuits Conference (ESSCIRC) 2009, Athens (GR), Sept. 14-18 2009, pp. 384-387.

A 5.75 to 44-Gb/s Quarter Rate CDR with Data Rate Selection in 90-nm Bulk CMOS
L. Rodoni, G. von Bueren, A. Huber, M. Schmatz, H. Jackel
IEEE Journal of Solid-State Circuits, vol. 44, no. 7, pp. 1927-1941, Jul. 2009.

Differential Phase Frequency Detector with Zero Systematic Timing Misalignment
G. von Buren, C. Kromer, S. Wehrli, A. Huber, T. Morf, H. Jackel
IEEE Semiconductor Conference Dresden (SCD), 2009, Dresden (D).

A 5.75 to 44 Gb/s Quarter Rate CDR with Data Rate Selection in 90-nm Bulk CMOS
G. von Bueren, L. Rodoni, A. Huber, R. Brun, D. Holzer, M. Schmatz, H. Jackel
European Solid-State Circuits Conference (ESSCIRC) 2008, Edinburgh (UK), Sept. 15-19 2008, pp. 166-169.

A 4.5-5.3 GHz Quadrature VCO with Complementary Couplers in 0.25μm CMOS
G. von Buren, L. Rodoni, D. Barras, S. Wehrli, F. Ellinger, H. Jackel
Dresden Semiconductor Conference (2008).

A Combined Dynamic and Static Frequency Divider for a 40GHz PLL in 80nm CMOS
G. von Buren, C. Kromer, F. Ellinger, A. Huber, M. Schmatz, H. Jackel
IEEE International Solid-State Circuits Conference (ISSCC) 2006, pp. 2462 - 2471

Low Power Sampling Latch for up to 25 Gb/s 2x Oversampling CDR in 90-nm CMOS
G. v. Buren, L. Rodoni, C. Kromer, H. Jackel, A. Huber, T. Morf
European Solid-State Circuits Conference (ESSCIRC) 2006, Montreux (CH), Sept. 19-21 2006, pp. 106-109.

A very low power consuming 5 GHz CMOS VCO core with 800 MHz frequency tuning range
G. von Buren, F. Ellinger, H. Jackel
Conference for PhD Research in Microelectronics and Electronics (PRIME) 2005, Lausanne (CH), July 25-28 2005, vol. 1, pp. 125-128.

Low power consuming BiCMOS single-ended VCO for wireless LAN at C-band
G. von Buren, F. Ellinger, L. Rodoni, H. Jackel
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) 2004, Montreal (Canada), Sept. 13-14 2004, pp. 249-252.

Antenna coupled far-infrared/THz detector in CMOS
T. Morf, J. Weiss, L. Kull, H. Rothuizen, T. Toifl, M. Kossel, C. Menolfi, G. von Bueren, T. Brunschwiler, M. Schmatz
IET ELECTRONICS LETTERS, October 2009, Vol. 45, No. 25, pp. 1321 - 1323.

A Low-Power Baseband ASIC for an Energy-Collection IR-UWB Receiver
D. Barras, R. Meyer-Piening, G. von Bueren, W. Hirt, H. Jackel
IEEE Journal of Solid-State Circuits, vol. 44, no. 6, pp. 1721-1733, Jun. 2009.

A Multi-modulation Low-power FCC/EC-compliant IR-UWB RF Transmitter in 0.18-um CMOS
D. Barras, G. von Bueren, W. Hirt, H. Jackel
IEEE Radio Frequency Integrated Circuits Symposium (RFIC2009), Boston, Massachusetts, 7-9 June, 2009

A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With -16 dB Return Loss Over 10 GHz Bandwidth
M. Kossel, C. Menolfi, J. Weiss, P. Buchmann, G. von Bueren, L. Rodoni, T. Morf, T. Toifl, M. Schmatz
IEEE J. of Solid-State Circuits, Vol. 43, No. 12, pp. 2905 - 2920, Dec. 2008.

A T-Coil Enhanced High-Swing Source-Series-Terminated Transmitter in 65nm Bulk CMOS
M. Kossel, C. Menolfi, J. Weiss, P. Buchmann, G. von Bueren L. Rodoni, T. Morf, T. Toifl, M. Schmatz
IEEE International Solid-State Circuits Conference (ISSCC) 2008, pp. 100 - 599.

Compact and Low Power CMOS Decision Circuit up to 20 Gb/s
L. Rodoni, G. von Buren, F. Ellinger, A. Huber, H. Jackel
Dresden Semiconductor Conference (2008).

Design and investigation of a travelling wave amplifier in SOI CMOS with bulk contacts for operation up to 40 GHz
F. Ellinger, G. von Buren, L. Rodoni, P. Sakalas
IEEE International Conference on Microwaves, Radar and Wireless Communication (2008).

A 40-GHz static frequency divider with quadrature outputs in 80-nm CMOS
C. Kromer, G. von Buren, G. Sialm, T. Morf, F. Ellinger, H. Jackel
IEEE Microwave and Wireless Components Letters, Volume 16, Issue 10, Oct. 2006, pp. 564 - 566.

Continuous Tunable Phase Shifter Based on Injection Locked Local Oscillators at 30 GHz
H. Grubinger, G. von Buren, H. Barth, R. Vahldieck
IEEE Microwave Symposium Digest (MTT-S) 2006, June 11-16 2006, pp.1821 - 1824

60 GHz VCO with wideband tuning range fabricated on VLSI SOI CMOS technology
F. Ellinger, T. Morf, G. Buren, C. Kromer, G. Sialm, L. Rodoni, M. Schmatz, H. Jackel
IEEE Microwave Symposium Digest (MTT-S) 2004, June 6-11 2004, Vol.3, pp. 1329 - 1332

Wide tuning range LC-oscillator in 65nm SOI CMOS, based on switchable secondary inductor
T. Morf, M. Kossel, J. Weiss, C. Menolfi, T. Toifl, G. von Bueren, P. Buchmann, M. Schmatz
IET ELECTRONICS LETTERS, 22nd November 2007, Vol. 43, No. 24

30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology
F. Ellinger, L. C. Rodoni, G. Sialm, C. Kromer, G. von Buren, M. L. Schmatz, C. Menolfi, T. Toifl, T. Morf, M. Kossel, H. Jackel
IEEE Transactions on Microwave Theory and Techniques, Volume 52, Issue 5, May 2004, pp. 1382 - 1391

Low-power-consuming 24-Gb/s multiplexer in 90-nm CMOS for optical transceivers
L. C. Rodoni, T. Morf, F. Ellinger, G. von Buren, H. Jackel
International Symposium Electron Devices for Microwave and Optoelectronic Applications (EDMO) 2004, 8-9 Nov. 2004, pp. 48 - 51

Influence of wiring parasitics on CMOS logic gates
L. C. Rodoni, F. Ellinger, G. von Buren, H. Jackel
IEEE MTT-S Microwave and Optoelectronics Conference (IMOC) 2003, 20-23 Sept. 2003, Vol. 3

High-Q inductors on digital VLSI CMOS substrate for analog RF applications
F. Ellinger, M. Kossel, M. Huber, M. Schmatz, C. Kromer, G. Sialm, D. Barras, L. Rodoni, G. von Buren, H. Jackel
IEEE MTT-S Microwave and Optoelectronics Conference (IMOC) 2003, 20-23 Sept. 2003, Vol. 2, pp. 869 - 872.

Gait Identification and Recognition Sensor
M. R. Popovic, T. Keller, S. Ibrahim, G. von Bueren, M. Morari
6th Vienna Int. Workshop Functional Electrostimulation, Vienna, Austria, 1998.

Supervised Student Projects

Master Theses

• Digital Loop Filter for All-digital Clock and Data Recovery Circuit (2006)
• Semi-digital PLL for High-Speed Serial Links (2005)
• UWB Transceiver Building Blocks (2006)
• CMOS Sampling Latches for Clock and Data Recovery Systems (2005)

Semester Theses

• 10 GHz Ring-oscillator with High Supply Noise Immunity (SS07)
• Charge-pump with high supply noise immunity for 10 GHz PLL (SS07)
• Self-Calibration and Control Circuit for Programmable PLLs (SS07)
• Infrared Detector Array in Standard SOI CMOS (SS06)
• Precise Clock Phases for a 40Gb/s CDR in 90nm CMOS (HS 07)
• Case Study of an All-digital PLL (SS06)
• Local Oscillator for a UWB Transceiver (SS05)
• High Speed Frequency Dividers (WS 04/05)